Open Source Everywhere: ORCONF 2015 at CERN

I’m in CERN this weekend at the annual meeting of the Free and Open Source silicon design community.  CERN with its open hardware group is a leading player in this area.

This is our fourth meeting, and the size reflects the explosion in interest in open source for hardware.  Our first conference had less than 20 attendees.  This year we have 100.

The number of free and open source processor designs is growing.  The granddaddy is the OpenRISC 1000, but more recently Krste Asanovic and David Patterson (he of RISC-1 fame) created the RISC-V architecture, and groups all over the world are building chips based on this.  With clock rates of up to 2GHz and energy usage of 30GFlops/Watt these are not just free and open source, they are possibly the most efficient general purpose processors in the world.

I can’t even start to touch on all the subjects we have covered – you can see the list on the ORCONF website.  For some great pictures, follow the Twitter tags #orconf and #orconf2015.  But these are engineers who know few limits.  The picture with this blog is Sebastian Macke talking about his jor1k JavaScript simulator for the RISC-V processor.  Run Linux on a simulated chip on his website.

I suspect this is an area, few OSC members know about, but it is a rapidly growing field.  As the trade body, we support open source in all its forms.  Including hardware!

Jeremy Bennett, OSC Treasurer